1. Field of the Invention
The present invention relates generally to image reject mixers, and more specifically to image reject mixers operating at frequencies reaching several tens of gigahertz and above.
2. Prior Art
As wireless communication progresses, the frequency of operation increases dramatically. Currently frequencies of tens of GHz are employed and are expected to increase over time. Operation at high frequencies is also known to be demanding in power as well as technology. That is, for the same design, the higher the frequency of operation the higher the power consumption. The higher frequency range also requires use of more esoteric manufacturing technologies, such as GaAs, that are capable of effectively addressing the frequency requirements, but such manufacturing technologies have a price from both a technology and a power perspective. As long as demand for such products is low, such technologies are tolerated, but as the need for mass production arises, it is required to utilize technologies that are more power friendly as well as less esoteric.
In order to reduce costs, there is a tendency to move from a more expensive process technology to a lower cost process technology, e.g., moving from GaAs to CMOS. However, a lower cost technology, such as CMOS, may suffer from other disadvantages. In the area of image reject mixers (IRMs) targeted to operate at frequencies in the range of tens of GHz, CMOS based technologies are not currently used, and hence the advantages associated with such technologies are not achieved. Moreover, active components are used, with the Gilbert cell being the prominent solution. An alternative approach is shown in FIG. 1. The MOS down-conversion multiplier mixer 100 comprises a quad MOS cell 110 and a transresistance amplifier 120 that is used to convert the mixer output current to voltage signal. Together with the capacitors 130, it further acts as a low-pass filter in order for only the intermediate frequency (IF) to pass through. The quad MOS cell 110 is a balanced mixer operative as a multiplying mixer. The RF signal at the input of the mixer is multiplied by the local oscillator (LO) signal. The low-pass filter of this circuit 100 cuts-off the RF+LO product while maintaining the IF RF−LO frequency.
The current art is limited because of its inability to provide frequency mixers that are low on power consumption, are implemented on cost-effective integrated circuit (IC) technologies, and are capable of operating at high intermediate (IF) frequencies, preferably in the GHz range. It would therefore be advantageous to provide a solution that overcomes the prior art limitations.